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TPS799: Output voltage rise time / soft start duration

Part Number: TPS799
Other Parts Discussed in Thread: TPS7B81-Q1

Hello all,

In my design, I'm using the TPS79933 LDO

I was looking for the output rise time in order to make there is no significant inrush current at startup.

I came across this graph which shows the output voltage rise time at Vout=3V + Cout=10uF

something is a bit weird...

It looks like the rise time is about 20usec, and using the I=c*[dv/dt] formula, and I get an input current of (I'm neglecting Rout-19ohm):

Iout=10*10-6* [3/20*10^-6]

Iout=1.5A

How can the LDO support this current level, if the internal current limit is 600mA max?

Thanks!

Nir

  • Hi Nir,

    I actually calculate about 2.1A peak inrush current during the first rising leg, because it is steeper (higher dV/dt and hence higher peak current). The reason for this is the time scale. The whole startup is happening in about 20us, and LDOs don't have a huge amount of bandwidth. So when a device like this that does not have the capability to start up directly into current limit begins starting up with an output capacitor that is large enough to draw current-limit-level inrush current, the current limit circuit takes a finite amount of time to respond and bring the current back down, and the result is that the inrush current overshoots the current limit. This is pretty common in LDOs, and the inrush peak current can be large if the output capacitor is large enough (I've done bench tests and seen >10A peak inrush before with a large output cap). 

    Regards,

    Nick

  • Hi Nick

    Thank you for the explanation,

    So the situation is even worst than I thought...

    I don't understand why showing this graph when 10uF load will cause this high current to flow through the device, even if is "only" for a few micro-seconds.

    2.1A is well above the maximum current mentioned in the datasheet (600mA current limit is the maximum)

    How can one make sure how much is too much current for the device to handle?

    It's totally a gray area that isn't mentioned on a datasheet...

    Thanks

    Nir

  • Hi Nir,

    This is the case with many LDOs, especially older ones. Many modern devices are designed such that the current is limited to ICL always, such as TPS7B81-Q1, which I recently ran some sims for - see the startup waveform with IOUT shown below. This was ran with COUT = 56uF. 

    The "few microseconds" startup time is important because the faster the reference voltage ramps up, the faster the output ramps up, and charging the output cap faster requires more current. Some devices have a soft-start feature that slows down the reference ramp rate, which helps to reduce the inrush current. 

    Unless the output cap is on the order of hundreds uF, the device normally doesn't have an issue handling the inrush current. There are 2 concerns with excessive inrush current from the perspective of the LDO (the system performance is usually the limiting factor): 1) Bonding wires can fuse if the current is too high, but this fusing current is usually several amps and this is very uncommon to happen. 2) In rare cases the pulsed power can cause the device to enter thermal shutdown during startup, but again this is very uncommon. 

    Regards,

    Nick

  • Hi Nick,

    Thanks again for the explanation and for the example.

    This is all very fluid.

    Myself, as an engineer, I can only relay on what it is written in the datasheet.

    Again, if there is no mention of a high current consideration (more than the 600mA max current limit), I would consider it to be the highest allowed current through the device.

    Is this case, C-load of 10uF will cause a large inrush current.

    I guess a few micro-farads would be ok (3-4uF - including the required 2.2uF output capacitor)

    Thanks

    Nir